Applied Materials, Inc. introduced innovations that help customers continue 2D scaling with EUV and detailed the industry’s broadest portfolio of technologies for manufacturing next-generation 3D Gate-All-Around transistors. Chipmakers are pursuing two complementary paths to increase transistor density in the years ahead. One is classic Moore’s Law 2D scaling, creating smaller features using EUV lithography and materials engineering. The other is using design technology cooptimization (DTC...